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PD- 95898
IRFPS43N50KPBF
SMPS MOSFET
Applications l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits l Lead-Free Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Low RDS(on) Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage dv/dtPeak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case )
HEXFET(R) Power MOSFET
VDSS
500V
RDS(on) typ.
0.078
ID
47A
Super-247TM
Max.
47 29 190 540 4.3 30 9.0 -55 to + 150 300
Units
A W W/C V V/ns
C
Avalanche Characteristics
Symbol
EAS IAR EAR
Parameter
Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
910 47 54
Units
mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA
Parameter
Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24 ---
Max.
0.23 --- 40
Units
C/W
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1
09/14/04
IRFPS43N50KPBF
Static @ TJ = 25C (unless otherwise specified)
Symbol V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) IDSS IGSS
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
Min. Typ. Max. Units Conditions 500 --- --- V VGS = 0V, ID = 250A --- 0.60 --- V/C Reference to 25C, ID = 1mA --- 0.078 0.090 VGS = 10V, ID = 28A 3.0 --- 5.0 V VDS = V GS, ID = 250A --- --- 50 A VDS = 500V, VGS = 0V --- --- 250 A VDS = 400V, VGS = 0V, TJ = 125C --- --- 100 VGS = 30V nA --- --- -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 23 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 25 140 55 74 8310 960 120 10170 240 440 Max. Units Conditions --- S VDS = 50V, ID = 28A 350 ID = 47A 85 nC VDS = 400V 180 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 47A ns --- RG = 1.0 --- VGS = 10V,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V
Diode Characteristics
Symbol IS
ISM
VSD trr Q rr IRRM ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Reverse RecoveryCurrent Forward Turn-On Time
Min. Typ. Max. Units --- --- --- --- 47 A 190
--- --- 1.5 V --- 620 940 ns --- 14 21 C --- 38 --- A Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25C, IS = 47A, VGS = 0V TJ = 25C, IF = 47A di/dt = 100A/s
D
S
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Pulse width 400s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Starting TJ = 25C, L = 0.82mH, RG = 25,
IAS = 47A (See Figure 12a).
ISD 47A, di/dt 230A/s, VDD V(BR)DSS,
TJ 150C.
2
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IRFPS43N50KPBF
1000
I D , Drain-to-Source Current (A)
100
10
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM4.5V TOP
10
1
4.5V
1
0.1
4.5V
20s PULSE WIDTH TJ = 25 C
1 10 100
0.01 0.1
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance (Normalized)
1000
3.5 3.0 2.5 2.0 1.5 1.0 0.5
ID = 48A
I D , Drain-to-Source Current (A)
100
TJ = 150 C
10
TJ = 25 C
1
0.1
V DS= 50V 20s PULSE WIDTH 4 5 6 7 8 9 10 11 12
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFPS43N50KPBF
1000000
20
100000
C, Capacitance(pF)
Coss = Cds + Cgd 10000
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd
ID = 48A
V DS= 400V V DS= 250V V DS= 100V
15
Ciss
10
1000
Coss
100
Crss
5
10 1 10 100 1000
0 0 50 100 150 200 250 300 350
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
TJ = 150 C
10
ID , Drain Current (A)
100
100
10us
100us 10
TJ = 25 C
1
1ms
0.1 0.2
V GS = 0 V
0.7 1.2 1.7 2.2
1
TC = 25 C TJ = 150 C Single Pulse
10 100
10ms
1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFPS43N50KPBF
50
V DS VGS
RD
40
ID , Drain Current (A)
RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
30
20
Fig 10a. Switching Time Test Circuit
10
VDS 90%
0
25
50
75
100
125
150
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response(Z thJC )
0.1
D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFPS43N50KPBF
2000
EAS , Single Pulse Avalanche Energy (mJ)
TOP BOTTOM
ID 22A 30A 47A
15V
1500
1000
VDS
L
DRIVER
RG
D.U.T
IAS
+ - VDD
A
500
20V
tp
0.01
Fig 12c. Unclamped Inductive Test Circuit
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
Fig 12a. Maximum Avalanche Energy Vs. Drain Current
tp
V(BR)DSS
I AS
Fig 12d. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
QG
VGS
D.U.T. + V - DS
QGS VG
QGD
VGS
3mA
IG
ID
Current Sampling Resistors
Charge
Fig 13a. Gate Charge Test Circuit
Fig 13b. Basic Gate Charge Waveform
6
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IRFPS43N50KPBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ V DD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFPS43N50KPBF
Case Outline and Dimensions -- Super-247
Super-247 (TO-274AA) Part Marking Information
EXAMPLE: THIS IS AN IRFPS37N50A WITH ASSEMBLY LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" PART NUMBER INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
IRFPS37N50A 719C 17 89
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
Note: "P" in assembly line position indicates "Lead-Free"
TOP
Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.09/04
8
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